论文标题

关于内存的散装处理的一致性

On Consistency for Bulk-Bitwise Processing-in-Memory

论文作者

Perach, Ben, Ronnen, Ronny, Kvatinsky, Shahar

论文摘要

内存处理(PIM)体系结构允许软件在内存中明确启动计算。这有效地使PIM操作与标准内存操作(例如,加载,存储)一起成为新的内存操作。对于软件正确性,至关重要的是,要使用其他PIM操作和其他内存操作进行PIM操作的订购规则,即考虑到PIM操作的一致性模型至关重要。据我们所知,现有作品几乎没有关注PIM操作一致性。在本文中,我们专注于一种特定的PIM方法,称为Bulk-Bitwise Pim。在散装局部PIM中,直接执行大型的皮特操作并存储在内存阵列中。我们表明,以前有关维持散装PIM相干性的相关主题的解决方案已经打破了主机一致性模型并防止任何保证的正确性。作为解决方案,我们提出并评估了从严格到放松的四个散装型PIM的一致性模型。我们的设计还可以保持PIM和主机处理器之间的相干性。使用YCSB短程扫描基准和TPC-H查询,通过GEM5模拟评估所提出的设计的性能,表明保证正确性的运行时间最多为6美元\%\%$ $,并且在许多情况下,运行时间甚至得到了改善。我们设计的硬件开销小于$ 0.22 \%$。

Processing-in-memory (PIM) architectures allow software to explicitly initiate computation in the memory. This effectively makes PIM operations a new class of memory operations, alongside standard memory operations (e.g., load, store). For software correctness, it is crucial to have ordering rules for a PIM operation with other PIM operations and other memory operations, i.e., a consistency model that takes into account PIM operations is vital. To the best of our knowledge, little attention to PIM operation consistency has been given in existing works. In this paper, we focus on a specific PIM approach, named bulk-bitwise PIM. In bulk-bitwise PIM, large bitwise operations are performed directly and stored in the memory array. We show that previous solutions for the related topic of maintaining coherency of bulk-bitwise PIM have broken the host native consistency model and prevent any guaranteed correctness. As a solution, we propose and evaluate four consistency models for bulk-bitwise PIM, from strict to relaxed. Our designs also preserve coherency between PIM and the host processor. Evaluating the proposed designs' performance with a gem5 simulation, using the YCSB short-range scan benchmark and TPC-H queries, shows that the run time overhead of guaranteeing correctness is at most $6\%$, and in many cases the run time is even improved. The hardware overhead of our design is less than $0.22\%$.

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