论文标题
基于动态模板和网格的自定义IC布局生成引擎
A Custom IC Layout Generation Engine Based on Dynamic Templates and Grids
论文作者
论文摘要
本文介绍了高级CMOS技术中的自动布局生成框架。该框架扩展了基于模板和网格的布局生成方法，采用以下其他技术来更有效地产生最佳布局。首先，布局模板和网格是在运行时动态创建和调整的，以满足各种结构，功能和设计要求。虚拟实例支持动态模板和基于网格的布局生成过程。该框架还实现了各种后处理功能，以有效地处理特定于过程的需求。后处理功能包括剪切/虚拟图案生成和多重调整。发电机描述功能通过圆形网格索引/切片和条件转换操作员增强。布局生成框架应用于各种设计示例，并在多种CMOS技术中自动生成DRC/LVS干净的布局。
This paper presents an automatic layout generation framework in advanced CMOS technologies. The framework extends the template-and-grid-based layout generation methodology with the following additional techniques applied to produce optimal layouts more effectively. First, layout templates and grids are dynamically created and adjusted during runtime to serve various structural, functional, and design requirements. Virtual instances support the dynamic template-and-grid-based layout generation process. The framework also implements various post-processing functions to handle process-specific requirements efficiently. The post-processing functions include cut/dummy pattern generation and multiple-patterning adjustment. The generator description capability is enhanced with circular grid indexing/slicing and conditional conversion operators. The layout generation framework is applied to various design examples and generates DRC/LVS clean layouts automatically in multiple CMOS technologies.
