论文标题
IFDMA收发器中有效的FFT计算
Efficient FFT Computation in IFDMA Transceivers
论文作者
论文摘要
与正交FDMA（OFDMA）等竞争对手（OFDMA）相比，交错的频分多访问多重访问（IFDMA）具有较低的峰值功率比（PAPR）的显着优势。最近的研究工作提出了一种新的IFDMA收发器设计，而不是传统的IFDMA收发器的复杂性。新的IFDMA收发器设计通过利用IFDMA信号处理与Cooley-Tukey IFFT/FFT/FFT算法结构之间的一定对应关系来降低复杂性，以便可以根据流的尺寸在IFFT/FFT模块的不同阶段插入/提取IFDMA流。尽管先前的工作奠定了新的IFDMA收发器结构的理论基础，但尚未仔细研究对特定硬件的收发器对特定硬件的实际实现。本文试图填补空白。具体而言，本文提出了一种称为多优先级调度（MPS）的启发式算法，以安排IFDMA收发器中蝴蝶计算的执行，并限制有限数量的硬件处理器。当应用于IFDMA信号处理时，所得的FFT计算（称为MPS-FFT）的计算时间比常规FFT计算要低得多。重要的是，我们为最佳的IFDMA FFT计算时间得出了一个下限，以基准MPS-FFT。我们的实验结果表明，当硬件处理器的数量为两个功率时：1）MPS-FFT的计算时间几乎是最佳的。 2）MPS-FFT的少于常规管道FFT的计算时间的44.13 \％。
Interleaved Frequency Division Multiple Access (IFDMA) has the salient advantage of lower Peak-to-Average Power Ratio (PAPR) than its competitors like Orthogonal FDMA (OFDMA). A recent research effort put forth a new IFDMA transceiver design significantly less complex than conventional IFDMA transceivers. The new IFDMA transceiver design reduces the complexity by exploiting a certain correspondence between the IFDMA signal processing and the Cooley-Tukey IFFT/FFT algorithmic structure so that IFDMA streams can be inserted/extracted at different stages of an IFFT/FFT module according to the sizes of the streams. Although the prior work has laid down the theoretical foundation for the new IFDMA transceiver's structure, the practical realization of the transceiver on specific hardware with resource constraints has not been carefully investigated. This paper is an attempt to fill the gap. Specifically, this paper puts forth a heuristic algorithm called multi-priority scheduling (MPS) to schedule the execution of the butterfly computations in the IFDMA transceiver with the constraint of a limited number of hardware processors. The resulting FFT computation, referred to as MPS-FFT, has a much lower computation time than conventional FFT computation when applied to the IFDMA signal processing. Importantly, we derive a lower bound for the optimal IFDMA FFT computation time to benchmark MPS-FFT. Our experimental results indicate that when the number of hardware processors is a power of two: 1) MPS-FFT has near-optimal computation time; 2) MPS-FFT incurs less than 44.13\% of the computation time of the conventional pipelined FFT.
