论文标题
在寄存器转移级别设计ML弹性锁定
Designing ML-Resilient Locking at Register-Transfer Level
论文作者
论文摘要
已经提出了各种逻辑锁定方案，以保护硬件免受知识产权盗版和恶意设计的修改。由于逻辑综合后，传统的锁定技术应用于栅极级的网络清单，因此它们对设计功能没有语义知识。数据驱动的机器学习（ML）攻击可以发现门级锁定内的设计缺陷。关于寄存器转移级别（RTL）锁定的最新建议可以访问语义硬件信息。我们研究了针对ML攻击的一种最先进的RTL锁定方法Assure的弹性。我们使用所学的教训来得出两个ML弹性的RTL锁定方案，以加强确保锁定。我们开发了ML驱动的安全指标，以评估针对最先进的基于ML的快照攻击的RTL改编的方案。
Various logic-locking schemes have been proposed to protect hardware from intellectual property piracy and malicious design modifications. Since traditional locking techniques are applied on the gate-level netlist after logic synthesis, they have no semantic knowledge of the design function. Data-driven, machine-learning (ML) attacks can uncover the design flaws within gate-level locking. Recent proposals on register-transfer level (RTL) locking have access to semantic hardware information. We investigate the resilience of ASSURE, a state-of-the-art RTL locking method, against ML attacks. We used the lessons learned to derive two ML-resilient RTL locking schemes built to reinforce ASSURE locking. We developed ML-driven security metrics to evaluate the schemes against an RTL adaptation of the state-of-the-art, ML-based SnapShot attack.
