论文标题
VAR-DRAM：有效动态随机访问记忆设计的变异感知框架
VAR-DRAM: Variation-Aware Framework for Efficient Dynamic Random Access Memory Design
论文作者
论文摘要
动态随机访问存储器（DRAM）由于其成本效益而成为主要存储设备的事实选择。与SRAM相比，它具有更大的容量和更高的带宽，但比后者慢。随着每一代人的发展，戏剧都变得越来越密集。其副作用之一是名义参数的偏差：过程，电压和温度。当它用容量交易性能时，急剧通常被认为是系统的瓶颈。有了这种固有的局限性，不希望的进一步偏离名义规格。在本文中，我们研究了常规DRAM设备对性能，可靠性和能源需求方面的变化的影响。基于这项研究，我们对一个称为VAR-DRAM的变异感知框架进行建模，该框架针对现代DRAM设备。它通过考虑变化来提供增强的电源管理。 VAR-DRAM确保程序内部将数据从变异的细胞中重新映射到正常细胞，并确保数据保存。在广泛的实验中，我们发现VAR-DRAM可实现高达48.8％的峰值能量节省，而DDR4记忆的平均为29.54％，同时改善了DRAM的访问潜伏期，而受影响的设备的峰值潜伏期则增加了7.4％。
Dynamic Random Access Memory (DRAM) is the de-facto choice for main memory devices due to its cost-effectiveness. It offers a larger capacity and higher bandwidth compared to SRAM but is slower than the latter. With each passing generation, DRAMs are becoming denser. One of its side-effects is the deviation of nominal parameters: process, voltage, and temperature. DRAMs are often considered as the bottleneck of the system as it trades off performance with capacity. With such inherent limitations, further deviation from nominal specifications is undesired. In this paper, we investigate the impact of variations in conventional DRAM devices on the aspects of performance, reliability, and energy requirements. Based on this study, we model a variation-aware framework, called VAR-DRAM, targeted for modern-day DRAM devices. It provides enhanced power management by taking variations into account. VAR-DRAM ensures faster execution of programs as it internally remaps data from variation affected cells to normal cells and also ensures data preservation. On extensive experimentation, we find that VAR-DRAM achieves peak energy savings of up to 48.8% with an average of 29.54% on DDR4 memories while improving the access latency of the DRAM compared to a variation affected device by 7.4%.
