论文标题

用于陡坡晶体管的二维冷电子​​传输

Two-dimensional Cold Electron Transport for Steep-slope Transistors

论文作者

Liu, Maomao, Jaiswal, Hemendra Nath, Shahi, Simran, Wei, Sichen, Fu, Yu, Chang, Chaoran, Chakravarty, Anindita, Liu, Xiaochi, Yang, Cheng, Liu, Yanpeng, Lee, Young Hee, Yao, Fei, Li, Huamin

论文摘要

常规的三维(3D)或二维(2D)半导体中的室温费米 - 迪拉克电子热激发产生的热电子具有相对较长的热尾能的热电子。这些热电子设定了一个基本障碍物,称为“ Boltzmann暴政”,该障碍限制了子阈值摇摆(SS),因此3D和2D现场效应晶体管(FETS)的最小功耗。在这里,我们研究了一种新型石墨烯(GR)的冷电子注入,其中GR充当狄拉克的来源,可在室温下为冷电子提供局部电子密度分布和短尾巴。这些冷电子对应于单层MOS2中的电子冷却效应,有效电子温度约为145 k,这使得降低传输因子,从而使陡峭的斜坡切换(在室温下在室温下为29 mV/十年持续30年),用于单层MOS2。特别是,与使用2D或3D通道材料的传统陡坡技术(例如隧穿Fets或负电容FET)相比,可以实现创纪录的高低60 mV/十年的电流密度(超过1μa/μm)。我们的工作展示了2D Dirac-Source Cold Electron晶体管作为创新的陡峭晶体管概念的巨大潜力,并为2D材料提供了新的机会,以实现未来的节能纳米电子学。

Room-temperature Fermi-Dirac electron thermal excitation in conventional three-dimensional (3D) or two-dimensional (2D) semiconductors generates hot electrons with a relatively long thermal tail in energy distribution. These hot electrons set a fundamental obstacle known as the "Boltzmann tyranny" that limits the subthreshold swing (SS) and therefore the minimum power consumption of 3D and 2D field-effect transistors (FETs). Here, we investigated a novel graphene (Gr)-enabled cold electron injection where the Gr acts as the Dirac source to provide the cold electrons with a localized electron density distribution and a short thermal tail at room temperature. These cold electrons correspond to an electronic cooling effect with the effective electron temperature of ~145 K in the monolayer MoS2, which enable the transport factor lowering and thus the steep-slope switching (across for 3 decades with a minimum SS of 29 mV/decade at room temperature) for a monolayer MoS2 FET. Especially, a record-high sub-60-mV/decade current density (over 1 μA/μm) can be achieved compared to conventional steep-slope technologies such as tunneling FETs or negative capacitance FETs using 2D or 3D channel materials. Our work demonstrates the great potential of 2D Dirac-source cold electron transistor as an innovative steep-slope transistor concept, and provides new opportunities for 2D materials toward future energy-efficient nanoelectronics.

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