论文标题
ATLAS内部跟踪器像素检测器读数升级的千兆收发器的表征
Characterization of a gigabit transceiver for the ATLAS inner tracker pixel detector readout upgrade
论文作者
论文摘要
我们为Atlas Inner Tracker（ITK）Pixel检测器读数升级提供了一个千兆收发器原型应用程序应用程序特定的集成电路（ASIC），GBCR。 GBCR在65 nm的CMOS技术中设计，由四个上游接收器通道，下游发射器通道和一个集成电路（I2C）从属组成。上游通道以5.12 Gbps接收数据，通过5米34-美国的电线量表（AWG）双轴（Twinax）电缆，将它们均衡，用恢复的时钟保持均衡，然后驱动光学发射器。下游通道从光学接收器接收到2.56 Gbps的数据，并将电缆与上游通道一样驱动。当Clock-DATA恢复（CDR）模块打开时，上游通道输出的抖动为35 PS（峰峰），并且电缆为138 PS（峰峰）后，下游通道输出的抖动。当CDR模块打开并且下游通道消耗27兆瓦时，每个上游通道的功耗为72兆瓦。 GBCR的总电离剂量为200 kgy。
We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream receiver channels, a downstream transmitter channel, and an Inter-Integrated Circuit (I2C) slave. The upstream channels receive the data at 5.12 Gbps passing through 5-meter 34-American Wire Gauge (AWG) Twin-axial (Twinax) cables, equalize them, retime them with a recovered clock, and then drive an optical transmitter. The downstream channel receives the data at 2.56 Gbps from an optical receiver and drives the cable as same as the upstream channels. The jitter of the upstream channel output is measured to be 35 ps (peak-peak) when the Clock-Data Recovery (CDR) module is turned on and the jitter of the downstream channel output after the cable is 138 ps (peak-peak). The power consumption of each upstream channel is 72 mW when the CDR module is turned on and the downstream channel consumes 27 mW. GBCR survives the total ionizing dose of 200 kGy.
