论文标题
采样器偏移对时钟和数据恢复电路中抖动传输的影响
Impact of Sampler Offset on Jitter Transfer in Clock and Data Recovery Circuits
论文作者
论文摘要
本文展示了亚历山大相位检测器中采样触发器的输入如何影响时钟数据恢复电路中从数据到恢复的时钟的抖动传输。亚历山大相位检测器将时钟边缘的数据示例以恢复数据以及时钟的定时信息。定时信息用于时钟恢复电路，该电路基本上是PLL或DLL。一旦PLL（或DLL）锁定，相位检测器将对眼中心以及数据转换的数据进行样品。据展示了采样触发器在其过渡时采样的偏移如何影响从数据到恢复时钟的抖动传输。重要的是，零偏移并不总是最好的情况。研究了不同级别的数据依赖性抖动的效果。解释了这种现象的机制，并通过模拟支持了预测。该论文还讨论了一个跟踪电路，以使最小抖动点保持偏移。
This paper shows how the input offset of sampling flip-flops in the Alexander phase detector affects the jitter transfer from data to the recovered clock in a clock data recovery circuit. The Alexander phase detector samples the data at both the edges of the clock in order to recover the data, as well as the clock timing information. The timing information is used in a clock recovery circuit, which is basically a PLL or a DLL. Once the PLL (or DLL) is locked, the phase detector samples the data at the center of the eye as well as at the data transitions. It is shown how the offset of the sampling flip-flop that samples the data at its transitions influences the jitter transfer from data to the recovered clock. Importantly, it is shown that zero offset is not always the best case. The effect is studied for different levels of data dependent jitter. The mechanism of this phenomenon is explained and the predictions are supported with simulations. The paper also discusses a tracking circuit that keeps the offset at the minimum jitter point.
